Varactor-driven temperature compensation of CMOS floating-gate current memory

Research output: Contribution to conferencePaperpeer-review

1 Scopus citations


Floating-gate transistors serve as an attractive media for non-volatile storage of analog parameters in neural systems. However, conventional current memories based on floating-gate transistors are sensitive to variations in temperature, therefore limiting their applications to only controlled environments. In this paper we propose a temperature compensated floating-gate array that can be programmed to store currents down to picoampere level. At the core of the proposed architecture is a control algorithm that uses a varactor to adapt the floating-gate capacitance such that the temperature dependent factors can be effectively canceled. As a result, the stored current is theoretically a function of a reference current and the differential charge stored on the floating-gates. We validate the proof-of-concept using measurement results obtained from prototype current memory cells fabricated in a 0.5μm CMOS process.

Original languageEnglish
Number of pages4
StatePublished - 2012
Event2012 IEEE International Symposium on Circuits and Systems, ISCAS 2012 - Seoul, Korea, Republic of
Duration: May 20 2012May 23 2012


Conference2012 IEEE International Symposium on Circuits and Systems, ISCAS 2012
Country/TerritoryKorea, Republic of


  • analog processors
  • Current memory
  • floating-gate transistors
  • neural systems
  • sub-threshold
  • temperature compensation


Dive into the research topics of 'Varactor-driven temperature compensation of CMOS floating-gate current memory'. Together they form a unique fingerprint.

Cite this