Using M/G/l queueing models with vacations to analyze virtualized logic computations

  • Michael J. Hall
  • , Roger D. Chamberlain

Research output: Chapter in Book/Report/Conference proceedingConference contributionpeer-review

5 Scopus citations

Abstract

Visualization of logic computations (i.e., by sharing a fixed function across distinct data streams) provides a means to effectively utilize hardware resources by context switching the logic to support multiple data streams of computation and to improve the total throughput of all streams. Context switching allows the pipeline stages of the logic to be fully utilized when feedback is present and to support additional contexts using secondary memory. In this paper, we analyze the performance of a virtualized hardware design and develop M/G/1 queueing model equations to predict circuit performance. The server is modeled using a general distribution that takes vacations during the computation of an individual data stream. Using the model, we predict circuit performance and tune a schedule for optimal performance.

Original languageEnglish
Title of host publicationProceedings of the 33rd IEEE International Conference on Computer Design, ICCD 2015
PublisherInstitute of Electrical and Electronics Engineers Inc.
Pages78-85
Number of pages8
ISBN (Electronic)9781467371650
DOIs
StatePublished - Dec 14 2015
Event33rd IEEE International Conference on Computer Design, ICCD 2015 - New York City, United States
Duration: Oct 18 2015Oct 21 2015

Publication series

NameProceedings of the 33rd IEEE International Conference on Computer Design, ICCD 2015

Conference

Conference33rd IEEE International Conference on Computer Design, ICCD 2015
Country/TerritoryUnited States
CityNew York City
Period10/18/1510/21/15

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