The latency validation of the optical link for the ATLAS Liquid Argon Calorimeter Phase-I trigger upgrade

B. Deng, L. Xiao, X. Zhao, E. Baker, D. Gong, D. Guo, H. He, S. Hou, C. Liu, T. Liu, Q. Sun, J. Thomas, J. Wang, A. C. Xiang, D. Yang, J. Ye, W. Zhou

Research output: Contribution to journalArticlepeer-review

1 Scopus citations

Abstract

Two optical data link data transmission Application Specific Integrated Circuits (ASICs), the baseline and its backup, have been designed for the ATLAS Liquid Argon (LAr) Calorimeter Phase-I trigger upgrade. The latency of each ASIC and that of its corresponding receiver implemented in a back-end Field-Programmable Gate Array (FPGA) are critical specifications. In this paper, we present the latency measurements and simulation of two ASICs. The measurement results indicate that both ASICs achieve their design goals and meet the latency specifications. The consistency between the simulation and measurements validates the ASIC latency characterization.

Original languageEnglish
Article numberP05002
JournalJournal of Instrumentation
Volume13
Issue number5
DOIs
StatePublished - May 2 2018

Keywords

  • Front-end electronics for detector readout
  • Trigger concepts and systems (hardware and software)
  • VLSI circuits

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