Subthreshold, varactor-driven CMOS floating-gate current memory array with less than 150-ppm/^̂K temperature sensitivity

Floating-gate (FG) transistors serve as attractive media for nonvolatile storage of analog parameters. However, conventional FG current memories when used for storing subthreshold currents are sensitive to variations in temperature which limit their applications to controlled environments. In this paper, we propose a temperature-compensated high-density array of FG current memories that can be used for storing subthreshold currents ranging from picoamperes to nanoamperes. The core of the proposed architecture is a feedback control technique that uses a varactor to adapt the FG capacitance in a manner that the temperature-dependent factors are effectively canceled. As a result, the stored current is only a function of a reference current and the differential charge stored on the FG. Measured results from prototype arrays fabricated in a 0.5-μm CMOS process demonstrate a worst case temperature sensitivity of 150 ppm^̂K and programmability down to a few picoamperes. In this regard, we also present a novel method to precisely program currents on the proposed FG memory array by exploiting a linearizing property of the integrated varactor.