TY - GEN
T1 - Sub-threshold CMOS voltage-multipliers using hybrid RF-piezoelectric energy scavenging
AU - Trung, Nguyen Thanh
AU - Feng, Tao
AU - Hafliger, Philipp
AU - Chakrabartty, Shantanu
N1 - Publisher Copyright:
© 2014 IEEE.
PY - 2014/10/3
Y1 - 2014/10/3
N2 - We present a novel hybrid voltage-multiplier circuit that can efficiently scavenge energy from a combination of a radio-frequency (RF) signal and a sensor signal which is a low-frequency, low-energy piezoelectric signal from a piezoelectric transducer. The piezoelectric sensor signal is utilized for biasing a cross-coupled differential rectifier chain to an operating point where the RF signal energy can be efficiently harvested even if its amplitude is below the threshold voltage of the cross-coupled rectifier transistors. An adaptive biasing circuit ensures that the optimal operating point of the rectifier/multiplier can be tracked across different levels of input RF signal. The measurement results obtained from a 7-stage hybrid voltage-multiplier operating on 10 MHz RF signals show that the proposed technique can yield significant improvements in power conversion efficiency for low input power as compared to a conventional cross-coupled voltage multiplier circuit on the same die.
AB - We present a novel hybrid voltage-multiplier circuit that can efficiently scavenge energy from a combination of a radio-frequency (RF) signal and a sensor signal which is a low-frequency, low-energy piezoelectric signal from a piezoelectric transducer. The piezoelectric sensor signal is utilized for biasing a cross-coupled differential rectifier chain to an operating point where the RF signal energy can be efficiently harvested even if its amplitude is below the threshold voltage of the cross-coupled rectifier transistors. An adaptive biasing circuit ensures that the optimal operating point of the rectifier/multiplier can be tracked across different levels of input RF signal. The measurement results obtained from a 7-stage hybrid voltage-multiplier operating on 10 MHz RF signals show that the proposed technique can yield significant improvements in power conversion efficiency for low input power as compared to a conventional cross-coupled voltage multiplier circuit on the same die.
UR - http://www.scopus.com/inward/record.url?scp=84911164841&partnerID=8YFLogxK
U2 - 10.1109/CCE.2014.6916719
DO - 10.1109/CCE.2014.6916719
M3 - Conference contribution
AN - SCOPUS:84911164841
T3 - 2014 IEEE 5th International Conference on Communications and Electronics, IEEE ICCE 2014
SP - 304
EP - 308
BT - 2014 IEEE 5th International Conference on Communications and Electronics, IEEE ICCE 2014
PB - Institute of Electrical and Electronics Engineers Inc.
T2 - 5th IEEE International Conference on Communications and Electronics, IEEE ICCE 2014
Y2 - 30 July 2014 through 1 August 2014
ER -