98 Scopus citations

Abstract

The design and implementation of an analog system-on-chip template-based pattern classifier for biometric signature verification at sub-microwatt power is presented. A programmable array of floating-gate subthreshold MOS translinear circuits matches input features with stored templates and combines the scores into category outputs. Subtractive normalization of the outputs by current-mode feedback produces confidence scores which are integrated for category selection. The classifier implements a support vector machine to select programming values from training samples. A two-step calibration procedure during programming alleviates offset and gain errors in the analog array. A 24-class, 14-input, 720-template classifier trained for speaker identification and fabricated on a 3 mm × 3 mm chip in 0.5 μm CMOS delivers real-time recognition accuracy on par with floating-point emulation in software. At 40 classifications per second and 840 nW power, the processor attains a computational efficiency of 1.3 × 1012 multiply-accumulates per second per Watt of power.

Original languageEnglish
Pages (from-to)1169-1179
Number of pages11
JournalIEEE Journal of Solid-State Circuits
Volume42
Issue number5
DOIs
StatePublished - May 2007

Keywords

  • Flash analog memory
  • MOS translinear principle
  • Machine learning, biometrics
  • Micropower techniques
  • Smart sensors
  • Vector ADC

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