TY - GEN
T1 - Sigma-delta analog to LPC feature converters for portable recognition interfaces
AU - Chakrabartty, Shantanu
AU - Gore, Amit
PY - 2009
Y1 - 2009
N2 - For many recognition systems, the feature extraction unit forms the most computationally intensive and power consuming component. In this paper, we present a design of an analog-to-information converter that directly produces a pulse-encoded representation of linear predictive coded (LPC) features corresponding to an input analog signal. At the core of proposed design is a sigma-delta modulation procedure that is embedded within a learning step. Measured results from a fabricated prototype in a 0.5μm CMOS technology demonstrate the real-time functionality of the learner in extracting 6-dimensional online LPC features from input speech signal while consuming only 450 μW.
AB - For many recognition systems, the feature extraction unit forms the most computationally intensive and power consuming component. In this paper, we present a design of an analog-to-information converter that directly produces a pulse-encoded representation of linear predictive coded (LPC) features corresponding to an input analog signal. At the core of proposed design is a sigma-delta modulation procedure that is embedded within a learning step. Measured results from a fabricated prototype in a 0.5μm CMOS technology demonstrate the real-time functionality of the learner in extracting 6-dimensional online LPC features from input speech signal while consuming only 450 μW.
UR - http://www.scopus.com/inward/record.url?scp=70350140445&partnerID=8YFLogxK
U2 - 10.1109/ISCAS.2009.5118352
DO - 10.1109/ISCAS.2009.5118352
M3 - Conference contribution
AN - SCOPUS:70350140445
SN - 9781424438280
T3 - Proceedings - IEEE International Symposium on Circuits and Systems
SP - 2673
EP - 2676
BT - 2009 IEEE International Symposium on Circuits and Systems, ISCAS 2009
T2 - 2009 IEEE International Symposium on Circuits and Systems, ISCAS 2009
Y2 - 24 May 2009 through 27 May 2009
ER -