TY - GEN
T1 - Reducing indirect programming mismatch due to oxide-traps using dual-channel floating-gate transistors
AU - Huang, Chenling
AU - Chakrabartty, Shantanu
PY - 2009
Y1 - 2009
N2 - This paper presents a dual-channel architecture for floating-gate transistors that can alleviate the detrimental effects of oxide-traps seen in indirect programming techniques. The proposed transistor consists of four input/output ports that allow multiple paths for drain currents to flow and yet share the same gate-oxide and poly-silicon gate. As a result, one pair of the ports can be used for indirect programming, whereas the other pair can be actively connected to other analog circuits. Compared with the existing approaches for floating-gate programming, the proposed technique avoids disruption of the circuit operation and eliminates the effect of oxide-traps as well. In this paper we present measured results obtained from a dual-channel floatinggate current reference which has been fabricated in a 0.5-μm standard CMOS process.
AB - This paper presents a dual-channel architecture for floating-gate transistors that can alleviate the detrimental effects of oxide-traps seen in indirect programming techniques. The proposed transistor consists of four input/output ports that allow multiple paths for drain currents to flow and yet share the same gate-oxide and poly-silicon gate. As a result, one pair of the ports can be used for indirect programming, whereas the other pair can be actively connected to other analog circuits. Compared with the existing approaches for floating-gate programming, the proposed technique avoids disruption of the circuit operation and eliminates the effect of oxide-traps as well. In this paper we present measured results obtained from a dual-channel floatinggate current reference which has been fabricated in a 0.5-μm standard CMOS process.
UR - http://www.scopus.com/inward/record.url?scp=70350139092&partnerID=8YFLogxK
U2 - 10.1109/ISCAS.2009.5118122
DO - 10.1109/ISCAS.2009.5118122
M3 - Conference contribution
AN - SCOPUS:70350139092
SN - 9781424438280
T3 - Proceedings - IEEE International Symposium on Circuits and Systems
SP - 1783
EP - 1786
BT - 2009 IEEE International Symposium on Circuits and Systems, ISCAS 2009
T2 - 2009 IEEE International Symposium on Circuits and Systems, ISCAS 2009
Y2 - 24 May 2009 through 27 May 2009
ER -