Performance modeling of virtualized custom logic computations

  • Michael J. Hall
  • , Roger D. Chamberlain

Research output: Chapter in Book/Report/Conference proceedingConference contributionpeer-review

3 Scopus citations

Abstract

Virtualization of custom logic computations (i.e., by sharing a fixed function across distinct data streams), provides a means of reusing limited hardware resources. This is common practice in traditional processors where more than one user can share processor resources. In this paper, we virtualize a custom logic block using C-slow techniques to support fine-grain context-switching. We then develop and present an analytic model for several performance measures (throughput, latency, input queue occupancy) for both fine- and coarse-grained context switching. Next, we calibrate the analytic performance model with empirical measurements. We then validate the model via discrete-event simulation and use the model to predict the performance and develop optimal schedules for virtualized logic computations.

Original languageEnglish
Title of host publicationGLSVLSI 2014 - Proceedings of the 2014 Great Lakes Symposium on VLSI
PublisherAssociation for Computing Machinery
Pages89-90
Number of pages2
ISBN (Print)9781450328166
DOIs
StatePublished - 2014
Event24th Great Lakes Symposium on VLSI, GLSVLSI 2014 - Houston, TX, United States
Duration: May 21 2014May 23 2014

Publication series

NameProceedings of the ACM Great Lakes Symposium on VLSI, GLSVLSI

Conference

Conference24th Great Lakes Symposium on VLSI, GLSVLSI 2014
Country/TerritoryUnited States
CityHouston, TX
Period05/21/1405/23/14

Keywords

  • c-slow
  • hierarchical schedule
  • optimization
  • virtualization

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