Optimization of application-specific memories

Joseph G. Wingbermuehle; Ron K. Cytron; Roger D. Chamberlain

doi:10.1109/L-CA.2013.7

Optimization of application-specific memories

Joseph G. Wingbermuehle
, Ron K. Cytron
, Roger D. Chamberlain

Department of Computer Science & Engineering

Research output: Contribution to journal › Article › peer-review

1 Scopus citations

Abstract

Memory access times are the primary bottleneck for many applications today. This 'memory wall' is due to the performance disparity between processor cores and main memory. To address the performance gap, we propose the use of custom memory subsystems tailored to the application rather than attempting to optimize the application for a fixed memory subsystem. Custom subsystems can take advantage of application-specific properties as well as memory-specific properties to improve access times or write-backs given constraints on size or power.

Original language	English
Article number	6506839
Pages (from-to)	45-48
Number of pages	4
Journal	IEEE Computer Architecture Letters
Volume	13
Issue number	1
DOIs	https://doi.org/10.1109/L-CA.2013.7
State	Published - Jan 2014

Keywords

B Hardware
B Hardware
B.3 Memory Structures
B.3 Memory Structures
B.3.2 Design Styles
B.3.3 Performance Analysis and Design Aids
B.3.3.b Simulation
C Computer Systems Organization
C.1 Processor Architectures
C.1.5 Micro-architecture implementation considerations
C.1.5.e Memory hierarchy

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10.1109/L-CA.2013.7

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title = "Optimization of application-specific memories",

abstract = "Memory access times are the primary bottleneck for many applications today. This 'memory wall' is due to the performance disparity between processor cores and main memory. To address the performance gap, we propose the use of custom memory subsystems tailored to the application rather than attempting to optimize the application for a fixed memory subsystem. Custom subsystems can take advantage of application-specific properties as well as memory-specific properties to improve access times or write-backs given constraints on size or power.",

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year = "2014",

month = jan,

doi = "10.1109/L-CA.2013.7",

language = "English",

volume = "13",

pages = "45--48",

journal = "IEEE Computer Architecture Letters",

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T1 - Optimization of application-specific memories

AU - Wingbermuehle, Joseph G.

AU - Cytron, Ron K.

AU - Chamberlain, Roger D.

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N2 - Memory access times are the primary bottleneck for many applications today. This 'memory wall' is due to the performance disparity between processor cores and main memory. To address the performance gap, we propose the use of custom memory subsystems tailored to the application rather than attempting to optimize the application for a fixed memory subsystem. Custom subsystems can take advantage of application-specific properties as well as memory-specific properties to improve access times or write-backs given constraints on size or power.

AB - Memory access times are the primary bottleneck for many applications today. This 'memory wall' is due to the performance disparity between processor cores and main memory. To address the performance gap, we propose the use of custom memory subsystems tailored to the application rather than attempting to optimize the application for a fixed memory subsystem. Custom subsystems can take advantage of application-specific properties as well as memory-specific properties to improve access times or write-backs given constraints on size or power.

KW - B Hardware

KW - B.3 Memory Structures

KW - B.3.2 Design Styles

KW - B.3.3 Performance Analysis and Design Aids

KW - B.3.3.b Simulation

KW - C Computer Systems Organization

KW - C.1 Processor Architectures

KW - C.1.5 Micro-architecture implementation considerations

KW - C.1.5.e Memory hierarchy

UR - https://www.scopus.com/pages/publications/84910041136

U2 - 10.1109/L-CA.2013.7

DO - 10.1109/L-CA.2013.7

M3 - Article

AN - SCOPUS:84910041136

SN - 1556-6056

VL - 13

SP - 45

EP - 48

JO - IEEE Computer Architecture Letters

JF - IEEE Computer Architecture Letters

IS - 1

M1 - 6506839

ER -

Optimization of application-specific memories

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Keywords

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