TY - GEN
T1 - Neuromorphic In-Memory Computing Framework using Memtransistor Cross-bar based Support Vector Machines
AU - Kumar, P.
AU - Nair, A. R.
AU - Chatterjee, O.
AU - Paul, T.
AU - Ghosh, A.
AU - Chakrabartty, S.
AU - Thakur, C. S.
N1 - Publisher Copyright:
© 2019 IEEE.
PY - 2019/8
Y1 - 2019/8
N2 - This paper presents a novel framework for designing support vector machines (SVMs), which does not impose restriction on the SVM kernel to be positive-definite and allows the user to define memory constraint in terms of fixed template vectors. This makes the framework scalable and enables its implementation for low-power, high-density and memory constrained embedded application. An efficient hardware implementation of the same is also discussed, which utilizes novel low power memtransistor based cross-bar architecture, and is robust to device mismatch and randomness. We used memtransistor measurement data, and showed that the designed SVMs can achieve classification accuracy comparable to traditional SVMs on both synthetic and real-world benchmark datasets. This framework would be beneficial for design of SVM based wake-up systems for internet of things (IoTs) and edge devices where memtransistors can be used to optimize system's energy-efficiency and perform in-memory matrix-vector multiplication (MVM).
AB - This paper presents a novel framework for designing support vector machines (SVMs), which does not impose restriction on the SVM kernel to be positive-definite and allows the user to define memory constraint in terms of fixed template vectors. This makes the framework scalable and enables its implementation for low-power, high-density and memory constrained embedded application. An efficient hardware implementation of the same is also discussed, which utilizes novel low power memtransistor based cross-bar architecture, and is robust to device mismatch and randomness. We used memtransistor measurement data, and showed that the designed SVMs can achieve classification accuracy comparable to traditional SVMs on both synthetic and real-world benchmark datasets. This framework would be beneficial for design of SVM based wake-up systems for internet of things (IoTs) and edge devices where memtransistors can be used to optimize system's energy-efficiency and perform in-memory matrix-vector multiplication (MVM).
KW - memtransistor
KW - support vector machine
KW - wake-up system
UR - http://www.scopus.com/inward/record.url?scp=85074976468&partnerID=8YFLogxK
U2 - 10.1109/MWSCAS.2019.8885180
DO - 10.1109/MWSCAS.2019.8885180
M3 - Conference contribution
AN - SCOPUS:85074976468
T3 - Midwest Symposium on Circuits and Systems
SP - 311
EP - 314
BT - 2019 IEEE 62nd International Midwest Symposium on Circuits and Systems, MWSCAS 2019
PB - Institute of Electrical and Electronics Engineers Inc.
T2 - 62nd IEEE International Midwest Symposium on Circuits and Systems, MWSCAS 2019
Y2 - 4 August 2019 through 7 August 2019
ER -