TY - GEN
T1 - Mixed-criticality scheduling upon varying-speed processors
AU - Baruah, Sanjoy
AU - Guo, Zhishan
PY - 2013
Y1 - 2013
N2 - A varying-speed processor is characterized by two execution speeds: a normal speed and a degraded speed. Under normal circumstances it will execute at its normal speed, conditions during run-time may cause it to execute more slowly (but no slower than at its degraded speed). The problem of executing an integrated workload, consisting of some more important components and some less important ones, upon such a varying-speed processor is considered. It is desired that all components execute correctly under normal circumstances, whereas the more important components should execute correctly (although the less important components need not) if the processor runs at any speed no slower than its specified degraded speed.
AB - A varying-speed processor is characterized by two execution speeds: a normal speed and a degraded speed. Under normal circumstances it will execute at its normal speed, conditions during run-time may cause it to execute more slowly (but no slower than at its degraded speed). The problem of executing an integrated workload, consisting of some more important components and some less important ones, upon such a varying-speed processor is considered. It is desired that all components execute correctly under normal circumstances, whereas the more important components should execute correctly (although the less important components need not) if the processor runs at any speed no slower than its specified degraded speed.
UR - https://www.scopus.com/pages/publications/84894346686
U2 - 10.1109/RTSS.2013.15
DO - 10.1109/RTSS.2013.15
M3 - Conference contribution
AN - SCOPUS:84894346686
SN - 9781479920075
T3 - Proceedings - Real-Time Systems Symposium
SP - 68
EP - 77
BT - Proceedings - IEEE 34th Real-Time Systems Symposium, RTSS 2013
T2 - IEEE 34th Real-Time Systems Symposium, RTSS 2013
Y2 - 3 December 2013 through 6 December 2013
ER -