Mixed-criticality scheduling upon varying-speed processors

  • Sanjoy Baruah
  • , Zhishan Guo

Research output: Chapter in Book/Report/Conference proceedingConference contributionpeer-review

Abstract

A varying-speed processor is characterized by two execution speeds: a normal speed and a degraded speed. Under normal circumstances it will execute at its normal speed, conditions during run-time may cause it to execute more slowly (but no slower than at its degraded speed). The problem of executing an integrated workload, consisting of some more important components and some less important ones, upon such a varying-speed processor is considered. It is desired that all components execute correctly under normal circumstances, whereas the more important components should execute correctly (although the less important components need not) if the processor runs at any speed no slower than its specified degraded speed.

Original languageEnglish
Title of host publicationProceedings - IEEE 34th Real-Time Systems Symposium, RTSS 2013
Pages68-77
Number of pages10
DOIs
StatePublished - 2013
EventIEEE 34th Real-Time Systems Symposium, RTSS 2013 - Vancouver, BC, Canada
Duration: Dec 3 2013Dec 6 2013

Publication series

NameProceedings - Real-Time Systems Symposium
ISSN (Print)1052-8725

Conference

ConferenceIEEE 34th Real-Time Systems Symposium, RTSS 2013
Country/TerritoryCanada
CityVancouver, BC
Period12/3/1312/6/13

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