Low-latency and low-overhead encoder ASIC in the ATLAS LAr calorimeter trigger upgrade

Binwei Deng, Xiaoting Li, Datao Gong, Suen Hou, Chonghan Liu, Tiankuan Liu, Ping Kun Teng, Annie C. Xiang, Jingbo Ye, Xiandong Zhao

Research output: Contribution to journalArticlepeer-review

Abstract

In this article, an encoder Application Specific Integrated Circuit (ASIC) for high-speed serial data transmission is presented. The ASIC implements a low-latency and low-overhead line code and is fabricated with a commercial 0.25-µm Silicon-on-Sapphire CMOS technology. The ASIC operates at 640 MHz with a latency of no greater than 6.25 ns and the overhead of 14.3%. The encoder will be integrated with a serialiser and will be used in the A Toroidal LHC ApparatuS Liquid Argon (LAr) calorimeter Phase-I trigger upgrade.

Original languageEnglish
Pages (from-to)394-403
Number of pages10
JournalInternational Journal of Electronics
Volume104
Issue number3
DOIs
StatePublished - Mar 4 2017

Keywords

  • digital electronic circuits
  • Front-end electronics for detector readout
  • high-speed
  • low-latency
  • low-overhead
  • trigger concepts and systems (hardware and software)

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