Hybrid CMOS rectifier based on synergistic RF-piezoelectric energy scavenging

This paper presents a novel CMOS hybrid rectifier that can simultaneously and efficiently scavenge energy from a low-amplitude radio-frequency (RF) signal and a low-frequency, low-energy signal from a piezoelectric (PZT) transducer. The piezoelectric signal is used for biasing a complimentary, cross-coupled rectifier (CCCR) chain to an operating point such that the RF signal energy can be efficiently harvested, even if its amplitude is well below the threshold voltage (V_TH) of the rectifier transistors. The device sizes for the proposed design have been optimized to achieve the maximum DC output voltage and the proposed design is shown to effectively eliminate dead-zones in the rectifier response. The measurement results show that a 6-stage hybrid rectifier (HR) can generate up to 1 V DC output voltage at a load current of 3μA when a 300 mV peak-to-peak, 13.56 MHz RF signal is applied in conjunction with a 10 KHz, 2 V piezoelectric signal. Using measured results from prototypes fabricated in a 90 nm CMOS process, the proposed HR is shown to yield a significant improvement in power conversion efficiency (PCE) for low levels of input power when compared to a conventional CCCR that has been implemented on the same die.