TY - GEN
T1 - FSSD
T2 - 33rd International Conference on Field-Programmable Logic and Applications, FPL 2023
AU - Yu, Luyang
AU - Lu, Yizhen
AU - Mandava, Meghna
AU - Richter, Edward
AU - Mailthody, Vikram Sharma
AU - Min, Seung Won
AU - Hwu, Wen Mei
AU - Chen, Deming
N1 - Publisher Copyright:
© 2023 IEEE.
PY - 2023
Y1 - 2023
N2 - Solid State Drives (SSDs) have become increasingly popular due to their superior access latency and bandwidth compared to Hard Disk Drives (HDDs). However, to fully understand the impact of SSD design and microarchitecture on end-to-end application performance, researchers need to move beyond treating SSDs as black-box components. Unfortunately, purchasing multiple SSDs for research is expensive and ineffective since the underlying microarchitecture is still unknown to the system designer. While simulators have become the most popular method for studying SSDs, existing software-based simulators lack real data transfers and cannot simulate the latency from NVMe and PCIe interfaces. Additionally, simulating the entire SSD using software codes is time-consuming and limits the number of experiments that can be run in a reasonable amount of time. To address these issues, we present FSSD, an FPGA-based emulation system that models the latency and access patterns of an actual NVMe SSD. FSSD takes advantage of the flexibility of an FPGA, enabling users to customize SSD microarchitecture features and explore the design space for data-intensive applications. FSSD can be interacting with real operating systems, instead of relying on Virtual Machines like most other software simulators do. Evaluations show that FSSD provides over 1000x speedup compared to software-based simulation using the SimpleSSD simulator. The ability to customize SSD parameters and emulate NAND latency with high precision makes FSSD a valuable platform for SSD research and development. FSSD is also open-sourced to benefit the research community.
AB - Solid State Drives (SSDs) have become increasingly popular due to their superior access latency and bandwidth compared to Hard Disk Drives (HDDs). However, to fully understand the impact of SSD design and microarchitecture on end-to-end application performance, researchers need to move beyond treating SSDs as black-box components. Unfortunately, purchasing multiple SSDs for research is expensive and ineffective since the underlying microarchitecture is still unknown to the system designer. While simulators have become the most popular method for studying SSDs, existing software-based simulators lack real data transfers and cannot simulate the latency from NVMe and PCIe interfaces. Additionally, simulating the entire SSD using software codes is time-consuming and limits the number of experiments that can be run in a reasonable amount of time. To address these issues, we present FSSD, an FPGA-based emulation system that models the latency and access patterns of an actual NVMe SSD. FSSD takes advantage of the flexibility of an FPGA, enabling users to customize SSD microarchitecture features and explore the design space for data-intensive applications. FSSD can be interacting with real operating systems, instead of relying on Virtual Machines like most other software simulators do. Evaluations show that FSSD provides over 1000x speedup compared to software-based simulation using the SimpleSSD simulator. The ability to customize SSD parameters and emulate NAND latency with high precision makes FSSD a valuable platform for SSD research and development. FSSD is also open-sourced to benefit the research community.
KW - Design Space Exploration
KW - FPGA
KW - SSD Emulator
UR - https://www.scopus.com/pages/publications/85178513686
U2 - 10.1109/FPL60245.2023.00022
DO - 10.1109/FPL60245.2023.00022
M3 - Conference contribution
AN - SCOPUS:85178513686
T3 - Proceedings - 2023 33rd International Conference on Field-Programmable Logic and Applications, FPL 2023
SP - 101
EP - 108
BT - Proceedings - 2023 33rd International Conference on Field-Programmable Logic and Applications, FPL 2023
A2 - Mentens, Nele
A2 - Mentens, Nele
A2 - Sousa, Leonel
A2 - Trancoso, Pedro
A2 - Papadopoulou, Nikela
A2 - Sourdis, Ioannis
PB - Institute of Electrical and Electronics Engineers Inc.
Y2 - 4 September 2023 through 8 September 2023
ER -