TY - GEN
T1 - Design of low-Gm transconductors using varactor-based degeneration and linearization technique
AU - Zhou, Liang
AU - Chakrabartty, Shantanu
N1 - Publisher Copyright:
© 2015 IEEE.
PY - 2015/12/4
Y1 - 2015/12/4
N2 - Low-Gm transconductors are useful for designing low-frequency-cutoff filters and amplifiers used in processing of biomedical signals. However, designing fully integrated low-Gm transconductors presents a challenge due to limitations on the size of on-chip capacitors and resistors and due to requirements on the signal dynamic range and the linearity of the transconductor. In this paper we propose a novel method for designing low-Gm transconductors using a varactor-based degeneration and linearization technique. The technique uses negative feedback where a varactor changes the capacitance of a floating-gate to compensate for the change in the input voltage. This results in the degeneration of the transconductance and a differential configuration of the input stage linearizes and enhances the dynamic range of the transconductor. We verify and characterize the proposed approach using measurement results obtained from prototypes fabricated in a 0.5-μm CMOS process.
AB - Low-Gm transconductors are useful for designing low-frequency-cutoff filters and amplifiers used in processing of biomedical signals. However, designing fully integrated low-Gm transconductors presents a challenge due to limitations on the size of on-chip capacitors and resistors and due to requirements on the signal dynamic range and the linearity of the transconductor. In this paper we propose a novel method for designing low-Gm transconductors using a varactor-based degeneration and linearization technique. The technique uses negative feedback where a varactor changes the capacitance of a floating-gate to compensate for the change in the input voltage. This results in the degeneration of the transconductance and a differential configuration of the input stage linearizes and enhances the dynamic range of the transconductor. We verify and characterize the proposed approach using measurement results obtained from prototypes fabricated in a 0.5-μm CMOS process.
UR - http://www.scopus.com/inward/record.url?scp=84962723622&partnerID=8YFLogxK
U2 - 10.1109/BioCAS.2015.7348305
DO - 10.1109/BioCAS.2015.7348305
M3 - Conference contribution
AN - SCOPUS:84962723622
T3 - IEEE Biomedical Circuits and Systems Conference: Engineering for Healthy Minds and Able Bodies, BioCAS 2015 - Proceedings
BT - IEEE Biomedical Circuits and Systems Conference
PB - Institute of Electrical and Electronics Engineers Inc.
T2 - 11th IEEE Biomedical Circuits and Systems Conference, BioCAS 2015
Y2 - 22 October 2015 through 24 October 2015
ER -