Abstract
This paper is the second in a series of two papers describing the methodology and algorithms used in the development of MISTIC (Michigan synthesis tools for integrated circuits). Part I discussed the basic topological algorithms used to produce generic sequences of processing steps required for the fabrication of a given device structure. Part II discusses the expansion of these sequences into complete process flows. This procedure involves the selection of specific recipes from a set of available processing resources and the calculation of recipe parameters. These processing resources are stored in a database central to the MISTIC system framework. Since many process flows are generated for a given device, the paper also discusses the calculation of suitable figures of merit. The capabilities of the MISTIC system are demonstrated with a BiCMOS example. The MISTIC system framework which contains the basic compiler and several supporting modules: a device builder, process viewer, and database editor is also presented.
Original language | English |
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Pages (from-to) | 129-138 |
Number of pages | 10 |
Journal | IEEE Transactions on Semiconductor Manufacturing |
Volume | 12 |
Issue number | 1 |
DOIs | |
State | Published - 1999 |
Keywords
- Process compilation
- Process flow design
- TCAD