Abstract
Recent advances in margin-propagation (MP) based approximate computing have resulted in analog computing circuits that exhibit scaling properties similar to that of digital computing circuits. MP-based circuits allow trading off energy-efficiency with speed and precision, endow robustness to temperature variations, and make the design portable across different process nodes. In this work, We leverage these scaling properties to design ARYABHAT, a field-programmable analog machine learning processor that can be synthesized like digital field-programmable gate arrays (FPGAs). ARYABHAT features a fully reconfigurable tile-based modular analog architecture with adjustable throughput and configurable energy requirements, making it suitable for various machine-learning computations. The architecture can perform computations at variable accuracy and different power-performance specifications and can simultaneously leverage near-memory computing paradigms to improve computational throughput. We also present a complete programming and test ecosystem for ARYABHAT called ARYAFlow and ARYATest. As proof of concept, we showcase the implementation of machine learning algorithms at different performance specifications.
| Original language | English |
|---|---|
| Pages (from-to) | 2252-2265 |
| Number of pages | 14 |
| Journal | IEEE Transactions on Circuits and Systems I: Regular Papers |
| Volume | 71 |
| Issue number | 5 |
| DOIs | |
| State | Published - May 1 2024 |
Keywords
- Analog machine learning
- analog accelerator
- field programmable
- margin propagation
- neural array
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