TY - GEN
T1 - A temperature compensated array of CMOS floating-gate analog memory
AU - Huang, Chenling
AU - Chakrabartty, Shantanu
PY - 2010
Y1 - 2010
N2 - Floating-gate transistors have been extensively used as analog memory elements in adaptive learning and neural systems. However, conventional techniques for storing and programming sub-threshold currents on floating-gate transistors are sensitive to temperature variations thus limiting their applicability to controlled environments. In this paper, we propose a temperature compensated floating-gate array which can be used to store and program currents down to nanoampere level. The core of the proposed current memory is a dual-channel floating-gate transistor based current reference circuit which uses a linear resistor in translinear loop. As a result the stored current is linearly proportional to the charge on the floating-gate and hence can be precisely programmed. The paper presents results from a prototype fabricated in a 0.5-μm CMOS process which validates the functionality of the proposed current memory cell.
AB - Floating-gate transistors have been extensively used as analog memory elements in adaptive learning and neural systems. However, conventional techniques for storing and programming sub-threshold currents on floating-gate transistors are sensitive to temperature variations thus limiting their applicability to controlled environments. In this paper, we propose a temperature compensated floating-gate array which can be used to store and program currents down to nanoampere level. The core of the proposed current memory is a dual-channel floating-gate transistor based current reference circuit which uses a linear resistor in translinear loop. As a result the stored current is linearly proportional to the charge on the floating-gate and hence can be precisely programmed. The paper presents results from a prototype fabricated in a 0.5-μm CMOS process which validates the functionality of the proposed current memory cell.
UR - http://www.scopus.com/inward/record.url?scp=77955998841&partnerID=8YFLogxK
U2 - 10.1109/ISCAS.2010.5536998
DO - 10.1109/ISCAS.2010.5536998
M3 - Conference contribution
AN - SCOPUS:77955998841
SN - 9781424453085
T3 - ISCAS 2010 - 2010 IEEE International Symposium on Circuits and Systems: Nano-Bio Circuit Fabrics and Systems
SP - 109
EP - 112
BT - ISCAS 2010 - 2010 IEEE International Symposium on Circuits and Systems
T2 - 2010 IEEE International Symposium on Circuits and Systems: Nano-Bio Circuit Fabrics and Systems, ISCAS 2010
Y2 - 30 May 2010 through 2 June 2010
ER -