A continuous-time varactor-based temperature compensation circuit for floating-gate multipliers and inner-product circuits

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Abstract

Floating-gate (FG) transistors are commonly used in synthetic neural systems for implementing analog multipliers. However, conventional floating-gate multipliers are sensitive to variations in temperature which limit their application to only controlled environments. Previously, we had reported an off-chip temperature compensation algorithm for floating-gate current memories which used varactors to cancel out the temperature dependent factors. In this paper, we report a continuous-time circuit implementation of the temperature compensation algorithm and show that it enables on-chip implementation of temperature compensated current amplifiers and analog multipliers. Using measured results from fabricated prototypes in a 0.5μm CMOS process, we demonstrate the functionality of the compensation circuit and show that it leads to an order-of-magnitude lower temperature sensitivity for FG multipliers when compared to an uncompensated case.

Original languageEnglish
Title of host publication2015 IEEE International Symposium on Circuits and Systems, ISCAS 2015
PublisherInstitute of Electrical and Electronics Engineers Inc.
Pages2513-2516
Number of pages4
ISBN (Electronic)9781479983919
DOIs
StatePublished - Jul 27 2015
EventIEEE International Symposium on Circuits and Systems, ISCAS 2015 - Lisbon, Portugal
Duration: May 24 2015May 27 2015

Publication series

NameProceedings - IEEE International Symposium on Circuits and Systems
Volume2015-July
ISSN (Print)0271-4310

Conference

ConferenceIEEE International Symposium on Circuits and Systems, ISCAS 2015
Country/TerritoryPortugal
CityLisbon
Period05/24/1505/27/15

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